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78 www.xilinx.com PowerPC™ 405 Processor Block Reference Guide
1-800-255-7778 UG018 (v2.0) August 20, 2004
Chapter 2: Input/Output Interfaces
R
C405PLBDCUPRIORITY[0:1] (Output)
These signals are used to specify the priority of the data-access request. Table 2-14 shows
the encoding of the 2-bit PLB-request priority signal. The priority is valid when the DCU is
presenting a data-access request to the PLB slave. It remains valid until the cycle following
acknowledgement of the request by the PLB slave (the PLB slave asserts
PLBC405DCUADDRACK to acknowledge the request).
Bit 1 of the request priority is controlled by the DCU. It is asserted whenever a data-read
request is presented on the PLB. The DCU can also assert this bit if the processor stalls due
to an unacknowledged request. Software controls bit 0 of the request priority by writing
the appropriate value into the DCU PLB-priority bit 1 of the core-configuration register
(CCR0[DPP1]).
If the least significant bits of the DCU and ICU PLB priority signals are 1 and the most
significant bits are equal, the PLB arbiter should let the DCU win the arbitration. This
generally results in better processor performance.
C405PLBDCUABORT (Output)
When asserted, this signal indicates the DCU is aborting the current data-access request. It
is used by the DCU to abort a request that has not been acknowledged, or is in the process
of being acknowledged by the PLB slave. The data-access request continues normally if
this signal is not asserted. This signal is only valid during the time the data-access request
signal is asserted. It must be ignored by the PLB slave if the data-access request signal is
not asserted. In the cycle after the abort signal is asserted, the data-access request signal is
deasserted and remains deasserted for at least one cycle.
If the abort signal is asserted in the same cycle that the data-access request is
acknowledged by the PLB slave (PLBC405DCUADDRACK is asserted), the PLB slave is
responsible for ensuring that the transfer does not proceed further. The PLB slave must not
assert the DCU read-data bus acknowledgement signal for an aborted request. It is
possible for a PLB slave to return the first write acknowledgement when acknowledging
0000_0111 Bytes 1:3 8:31 Bytes 5:7 40:63
0000_0010 Byte 2 16:23 Byte 6 48:55
0000_0011 Bytes 2:3 (Halfword 1) 16:31 Bytes 6:7 (Halfword 3) 48:63
0000_0001 Byte 3 24:31 Byte 7 56:63
Table 2-13: Interpretation of DCU Byte Enables During Word Transfers (Continued)
Byte Enables [0:7]
32-Bit PLB Slave Data Bus 64-Bit PLB Slave Data Bus
Valid Bytes Bits Valid Bytes Bits
Table 2-14: PLB-Request Priority Encoding
Bit 0 Bit 1 Definition
0 0 Lowest PLB-request priority.
0 1 Next-to-lowest PLB-request priority.
1 0 Next-to-highest PLB-request priority.
1 1 Highest PLB-request priority.