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PowerPC™ 405 Processor Block Reference Guide www.xilinx.com 157
UG018 (v2.0) August 20, 2004 1-800-255-7778
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Figure 3-9 shows an example of an ISOCM-to-BRAM interface in Virtex-II Pro.
Figure 3-10 shows an example of an ISOCM-to-BRAM interface in Virtex-4.
Figure 3-9: ISOCM to BRAM Interface: 8 KByte Example in Virtex-II Pro
UG018_49_112103
ISOCMBRAMRDABUS[19:28]
BRAMISOCMRDDBUS[0:63]
ISOCMBRAMEN
BRAMISOCMCLK
ISOCMBRAMWRDBUS[0:31]
ISOCMBRAMWRABUS[19:28]
ISOCMBRAMODDWRITEEN
ISOCMBRAMEVENWRITEEN
ISCNTLVALUE[0:7]
ISARCVALUE[0:7]
TIEISOCMDCRADDR[0:7]
(Virtex-II Pro Only)
ADDRB[9:0]
DOB[15:0]
WEB
CLKB
ENB*
SSRB
(RAMB16S18S18) X 4
(2 for Odd words, 2 for Even)
ADDRA[13:4]
PORT B
PORT A
DIA[15:0]
WEA
CLKA
ENA*
SSRA
(BRAMISOCMCLK from DCM)
*ENA can be tied off
permanently for higher
performance.
Global signals from FPG
A
system interface