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16 www.xilinx.com PowerPC™ 405 Processor Block Reference Guide
1-800-255-7778 UG018 (v2.0) August 20, 2004
Preface: About This Guide
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UISA The PowerPC user instruction-set architecture, which defines
the base user-level instruction set, registers, data types, the
memory model, the programming model, and the exception
model as seen by user programs.
user mode The operating mode typically used by application software.
Privileged operations are not allowed in user mode, and
software can access a restricted set of registers and memory.
VEA The PowerPC virtual-environment architecture, which defines
a multi-access memory model, the cache model, cache-control
instructions, and the time-base resources as seen by user
programs.
virtual address An intermediate address used to translate an effective address
into a physical address. It consists of a process ID and the
effective address. It is only used when address translation is
enabled.
wake up The transition of the PowerPC 405 out of the sleep state. The
PowerPC 405 processor clock begins toggling and the execution
state of the PowerPC 405 advances from that of the sleep state.
word Four bytes, or 32 bits.