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200 www.xilinx.com PowerPC™ 405 Processor Block Reference Guide
1-800-255-7778 UG018 (v2.0) August 20, 2004
Chapter 4: PowerPC 405 APU Controller
R
Note: Actual timing results may vary from those shown in Figure 4-4. For example, the operands
could come later than shown.
Figure 4-4: FCM Decoded Autonomous Transaction Example
UG018_04_03_032504
CPMFCMCLK
APUFCMINSTRUCTION
APUFCMINSTRVALID
FCMAPUINSTRACK
FCMAPU
OPTIONS
APUFCMRADATA/
APUFCMRBDATA
APUFCMOPERANDVALID
FCMAPUDONE
APUFCMWRITEBACKOK
FCMAPUSLEEPNOTREADY