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60 www.xilinx.com PowerPC™ 405 Processor Block Reference Guide
1-800-255-7778 UG018 (v2.0) August 20, 2004
Chapter 2: Input/Output Interfaces
R
fastest rate at which a BIU can transfer instructions to the ICU (there is no limit to the
number of cycles between two transfers).
x All line transfers assume the target instruction (word) is returned first. Subsequent
instructions in the line are returned sequentially by address, wrapping as necessary to
the lower addresses in the same line.
x The rate at which the ICU makes instruction-fetch requests to the BIU is not limited by
the rate instructions are executed.
x An ICU fetch request to the BIU occurs two cycles after a miss is determined by the
ICU.
x The ICU latches instructions into the fill buffer in the cycle after the instructions are
received from the BIU on the PLB.
x The transfer of instructions from the fill buffer to the instruction cache takes three
cycles. This transfer takes place after all instructions are read into the fill buffer from
the BIU.
x The BIU size (bus width) is 64 bits, so PLBC405ICUSSIZE1 is not shown.
x No instruction-access errors occur, so PLBC405ICUERR is not shown.
x The abort signal, C405PLBICUABORT is shown only in the last example.
x The storage attribute signals are not shown.
x The ICU activity is shown only as an aide in describing the examples. The occurrence
and duration of this activity is not observable on the ISPLB.
The abbreviations that appear in the timing diagrams are defined in Table 2-11.
Table 2-11: ISPLB Timing Diagram Abbreviations
Abbreviation
a
Description Where Used
rl# Fetch-request identifier Request
Request acknowledge
Read-data acknowledge
(C405PLBICUREQUEST)
(PLBC405ICUADDRACK)
(PLBC405ICURDDACK)
adr# Fetch-request address Request address (C405PLBICUABUS[0:29])
d#
#
Doublewords (two instructions)
transferred as a result of a fetch
request
ICU read-data bus (PLBC405ICURDDBUS[0:63])
miss# The ICU detects a cache miss that
causes a fetch request on the PLB
ICU
fill# The ICU is busy performing a fill
operation
ICU
byp# The ICU forwards instructions to
the PowerPC 405 instruction-
fetch unit from the fill buffer as
they become available (bypass)
ICU
prefetch# The ICU speculatively prefetches
instructions from the BIU
ICU