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198 www.xilinx.com PowerPC™ 405 Processor Block Reference Guide
1-800-255-7778 UG018 (v2.0) August 20, 2004
Chapter 4: PowerPC 405 APU Controller
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Table 4-10: Bit Map Between TIEAPUCONTROL and APU Configuration Register
APU Controller
Configuration Field
TIEAPUCONTROL Bits
LdStDecDis 0
UDIDecDis 1
ForceUDINonB 2
FPUDecDis 3
FPUCArithDis 4
FPUConvIDis 5
FPUEstimIDis 6
ForceFPUNonB 7
StoreWBOK 8
LdStPrivOp 9
ForceAlign 10
LETrap 11
BETrap 12
BESteer 13
APUDiv 14
FCMEn 15