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PowerPC™ 405 Processor Block Reference Guide www.xilinx.com 215
UG018 (v2.0) August 20, 2004 1-800-255-7778
R
C405JTGCAPTUREDR (OUTPUT) V-II Pro
and V-4
OJTAG No
Connect
Indicates the TAP controller is in the
capture-DR state.
C405JTGEXTEST (OUTPUT) V-II Pro
and V-4
OJTAG No
Connect
Indicates the JTAG EXTEST instruction
is selected.
C405JTGPGMOUT (OUTPUT) V-II Pro
and V-4
OJTAG No
Connect
Indicates the state of a general purpose
program bit in the JTAG debug control
register (JDCR).
C405JTGSHIFTDR (OUTPUT) V-II Pro
and V-4
OJTAG No
Connect
Indicates the TAP controller is in the
shift-DR state.
C405JTGTDO (OUTPUT) V-II Pro
and V-4
OJTAG No
Connect
JTAG TDO (test-data out).
C405JTGTDOEN (OUTPUT) V-II Pro
and V-4
OJTAG No
Connect
Indicates the JTAG TDO signal is
enabled.
C405JTGUPDATEDR (OUTPUT) V-II Pro
and V-4
OJTAG No
Connect
Indicates the TAP controller is in the
update-DR state.
C405DBGLOADDATAONAPUDBUS V-4 O DBG No
Connect
Valid load data from PowerPC 405 core
to APU Controller
C405PLBDCUABORT V-II Pro
and V-4
ODSPLBNo
Connect
Indicates the DCU is aborting an
unacknowledged data-access request.
C405PLBDCUABUS[0:31] V-II Pro
and V-4
ODSPLBNo
Connect
Specifies the memory address of the
data-access request.
C405PLBDCUBE[0:7] V-II Pro
and V-4
ODSPLBNo
Connect
Specifies which bytes are transferred
during single-word transfers.
C405PLBDCUCACHEABLE V-II Pro
and V-4
ODSPLBNo
Connect
Indicates the value of the cacheability
storage attribute for the target address.
C405PLBDCUGUARDED V-II Pro
and V-4
ODSPLBNo
Connect
Indicates the value of the guarded
storage attribute for the target address.
C405PLBDCUPRIORITY[0:1] V-II Pro
and V-4
ODSPLBNo
Connect
Indicates the priority of the data-access
request.
C405PLBDCUREQUEST V-II Pro
and V-4
ODSPLBNo
Connect
Indicates the DCU is making a data-
access request.
C405PLBDCURNW V-II Pro
and V-4
ODSPLBNo
Connect
Specifies whether the data-access
request is a read or a write.
C405PLBDCUSIZE2 V-II Pro
and V-4
ODSPLBNo
Connect
Specifies a single word or eight-word
transfer size.
C405PLBDCUU0ATTR V-II Pro
and V-4
ODSPLBNo
Connect
Indicates the value of the user-defined
storage attribute for the target address.
C405PLBDCUWRDBUS[0:63] V-II Pro
and V-4
ODSPLBNo
Connect
The DCU write-data bus used to
transfer data from the DCU to the PLB
slave.
C405PLBDCUWRITETHRU V-II Pro
and V-4
ODSPLBNo
Connect
Indicates the value of the write-
through storage attribute for the target
address.
C405PLBICUABORT V-II Pro
and V-4
OISPLBNo
Connect
Indicates the ICU is aborting an
unacknowledged fetch request.
Table B-1: PowerPC 405 Interface Signals in Alphabetical Order (Continued)
Signal
FPGA
Type
a
I/O
Type
Interface
If Unused
Ties To:
b
Function