Xilinx UG018 Yard Vacuum User Manual


 
PowerPC™ 405 Processor Block Reference Guide www.xilinx.com 135
UG018 (v2.0) August 20, 2004 1-800-255-7778
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PVR Interface I/O Signal Descriptions
The following sections describe the operation of the PVR-interface I/O signals.
TIEPVRBIT8 (Input)
When tied high sets Processor Version Register bit 8 to 1.
TIEPVRBIT9 (Input)
When tied high sets Processor Version Register bit 9 to 1.
TIEPVRBIT10 (Input)
When tied high sets Processor Version Register bit 10 to 1.
TIEPVRBIT11 (Input)
When tied high sets Processor Version Register bit 11 to 1.
TIEPVRBIT28 (Input)
When tied high sets Processor Version Register bit 28 to 1.
TIEPVRBIT29 (Input)
When tied high sets Processor Version Register bit 29 to 1.
TIEPVRBIT30 (Input)
When tied high sets Processor Version Register bit 30 to 1.
TIEPVRBIT31 (Input)
When tied high sets Processor Version Register bit 31 to 1.
Table 2-29: PVR Interface I/O Signals
Signal
I/O
Type
If Unused Function
TIEPVRBIT8 I No Connect Set bit 8 in Processor Version Register (OWN field)
TIEPVRBIT9 I No Connect Set bit 9 in Processor Version Register (OWN field)
TIEPVRBIT10 I No Connect Set bit 10 in Processor Version Register (OWN field)
TIEPVRBIT11 I No Connect Set bit 11 in Processor Version Register (OWN field)
TIEPVRBIT28 I No Connect Set bit 28 in Processor Version Register (AID field)
TIEPVRBIT29 I No Connect Set bit 29 in Processor Version Register (AID field)
TIEPVRBIT30 I No Connect Set bit 30 in Processor Version Register (AID field)
TIEPVRBIT31 I No Connect Set bit 31 in Processor Version Register (AID field)