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PowerPC™ 405 Processor Block Reference Guide www.xilinx.com 123
UG018 (v2.0) August 20, 2004 1-800-255-7778
R
.C405JTGSHIFTDR (),
.C405JTGUPDATEDR (),
.C405JTGPGMOUT (),
...
);
endmodule;
-- Module: SINGLE_PPC_JTAG_SERIAL
-- Description: VHDL instantiation template for serial connection of a
-- single PPC405 core to dedicated JTAG logic
library IEEE;
use IEEE.std_logic_1164.all;
entity SINGLE_PPC_JTAG_SERIAL is
port (
);
end SINGLE_PPC_JTAG_SERIAL;
architecture SINGLE_PPC_JTAG_SERIAL_arch of SINGLE_PPC_JTAG_SERIAL is
-- Component Declaration
component PPC405
port(
...
JTGC405TCK : in std_logic;
JTGC405TMS: in std_logic;
JTGC405TDI: in std_logic;
JTGC405TRSTNEG: in std_logic;
C405JTGTDO: out std_logic;
JTGC405BNDSCANTDO: in std_logic;
C405JTGTDOEN: out std_logic;
C405JTGEXTEST: out std_logic;
C405JTGCAPTUREDR: out std_logic;
C405JTGSHIFTDR: out std_logic;
C405JTGUPDATEDR: out std_logic;
C405JTGPGMOUT: out std_logic;
...
);
end component;
component JTAGPPC
port(
TDOTSPPC : in std_logic;
TDOPPC : in std_logic;
TMS : out std_logic;
TDIPPC : out std_logic;
TCK : out std_logic;
);
end component;
signal TDO_TS_PPC : std_logic;