Filter
Top Products
PowerPC™ 405 Processor Block Reference Guide www.xilinx.com 29
UG018 (v2.0) August 20, 2004 1-800-255-7778
R
Timer Resources
The PowerPC 405 contains a 64-bit time base and three timers. The time base is
incremented synchronously using the CPU clock or an external clock source. The three
timers are incremented synchronously with the time base. The three timers supported by
the PowerPC 405 are:
x Programmable Interval Timer
x Fixed Interval Timer
x Watchdog Timer
Programmable Interval Timer
The programmable interval timer (PIT) is a 32-bit register that is decremented at the time-base
increment frequency. The PIT register is loaded with a delay value. When the PIT count
reaches 0, a PIT interrupt occurs. Optionally, the PIT can be programmed to automatically
reload the last delay value and begin decrementing again.
Fixed Interval Timer
The fixed interval timer (FIT) causes an interrupt when a selected bit in the time-base register
changes from 0 to 1. Programmers can select one of four predefined bits in the time-base
for triggering a FIT interrupt.
Watchdog Timer
The watchdog timer causes a hardware reset when a selected bit in the time-base register
changes from 0 to 1. Programmers can select one of four predefined bits in the time-base
for triggering a reset, and the type of reset can be defined by the programmer.
Debug
The PowerPC 405 debug resources include special debug modes that support the various
types of debugging used during hardware and software development. These are:
x Internal-debug mode for use by ROM monitors and software debuggers
x External-debug mode for use by JTAG debuggers
x Debug-wait mode, which allows the servicing of interrupts while the processor appears
to be stopped
x Real-time trace mode, which supports event triggering for real-time tracing
Debug events are supported that allow developers to manage the debug process. Debug
modes and debug events are controlled using debug registers in the processor. The debug
registers are accessed either through software running on the processor or through the
JTAG port.
The debug modes, events, controls, and interfaces provide a powerful combination of
debug resources for hardware and software development tools.
PowerPC 405 Interfaces
The PowerPC 405 provides the following set of interfaces that support the attachment of
cores and user logic:
x Processor local bus interface