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Introduction
Status Reporting
The use of bit 6 can be confusing. This bit was defined to cover all possible computer inter-
faces, including a computer that could not do a serial poll. The important point to remember
is that, if you are using an SRQ interrupt to an external computer, the serial poll command
clears bit 6. Clearing bit 6 allows the instrument to generate another SRQ interrupt when
another enabled event occurs. The only other bit in the Status Byte Register affected by the
*STB? query is the Message Available bit (bit 4). If there are no other messages in the Output
Queue, bit 4 (MAV) can be cleared as a result of reading the response to the *STB? query.
If bit 4 (weight = 16) and bit 5 (weight = 32) are set, a program would print the sum of the
two weights. Since these bits were not enabled to generate an SRQ, bit 6 (weight = 64) is not
set.
Figure 1-3. Status Reporting Overview