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PXA250 and PXA210 Applications Processors Design Guide 2-5
System Memory Interface
2.4 SDRAM Support
Table 2-2 shows the SDRAM memory types and densities that are supported by the applications
processor.
.
Table 2-2. SDRAM Memory Types Supported by the Applications Processor
Partition Size
(Mbyte/Partition)
SDRAM
Configu-
ration
(Words x
Bits)
Chip
Size
Number Chips/
Partition
Bank Bits x
Row bits x
Column
Bits
Maximum
Memory
(4 Partitions)
Total Number
of Chips
16-bit
Bus
32-bit
Bus
16-bit
Bus
32-bit
bus
16-bit
Bus
32-bit
Bus
16-bit
Bus
32-bit
Bus
2 Mbyte 4 Mbyte 1M x 16 16 Mbit 1 2 1 x 11 x 8 8 Mbyte 16 Mbyte 4 8
4 Mbyte 8 Mbyte 2 M x 8 16 Mbit 2 4 1 x 11 x 9 16 Mbyte 32 Mbyte 8 16
8 Mbyte 16 Mbyte 4 M x 4 16 Mbit 4 8 1 x 11 x 10 32 Mbyte 64 Mbyte 16 32
N/A 8 Mbyte 2 M x 32 64 Mbit N/A 1 2 x 11 x 8 N/A 32 Mbyte N/A 4
8 Mbyte 16 Mbyte 4 M x 16 64 Mbit 1 2
1 x 13 x 8
2 x 12 x 8
32 Mbyte 64 Mbyte 4 8
16 Mbyte 32 Mbyte 8 M x 8 64 Mbit 2 4
1 x 13 x 9
2 x 12 x 9
64 Mbyte
128
Mbyte
816
32 Mbyte 64 Mbyte 16 M x 4 64 Mbit 4 8
1 x 13 x 10
2 x 12 x 10
128
Mbyte
256
Mbyte
16 32
16 Mbyte 32 Mbyte 8 M x 16 128 Mbit 1 2 2 x 12 x 9 64 Mbyte
128
Mbyte
48
32 Mbyte 64 Mbyte 16 M x 8 128 Mbit 2 4 2 x 12 x 10
128
Mbyte
256
Mbyte
816
64 Mbyte N/A 32 M x 4 128 Mbit 4 8 2 x 12 x 11
256
Mbyte
N/A 16 32
32 Mbyte 64 Mbyte
16 M x
16
256 Mbit 1 2 2 x 13 x 9
128
Mbyte
256
Mbyte
48
64 Mbyte N/A 32 M x 8 256 Mbit 2 4 2 x 13 x 10
256
Mbyte
N/A 8 16