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Chapter 3: Testing Performance
To test the multiple-clock state acquisition
d Connect all clock channels to the pulse generator channel 1 output.
e Click OK to close the Analyzer Setup dialog.
4 Select the logic analyzer sample positions:
a Click the Sampling Setup icon. The Analyzer Setup dialog opens with
the Sampling tab displayed.
b Click Sample Positions....
c In the Sample Positions dialog, drag the blue bar for My Bus 1 to the
sample position of the first setup/hold combination to be tested (or
enter the value in the signal fields).
d Click OK to close the Sample Positions dialog.
5 Verify the test data:
a Click the Run icon.
b If you have not already done so, do “Set up the Markers:” on page 34.
c If the "can't find 4096 occurence(s)" message does not appear, then the
test passes.
The test passes when the logic analyzer finds all occurances of the patterns
programmed into the Markers. If the test passes, record a "Pass" in the
performance test record under single-clock single-edge next to the clock and
edge being tested.