C-10 Hardware Port Access API
MX3-CE Reference Guide E-EQ-MX3CERG-A-ARC
GPIO Pin Access
WARNING: Accessing GPIO pins incorrectly (especially outputting data on
an input pin) can result in hardware damage and failure.
There are OEM API calls to read, write, and redirect GPIO data:
typedef struct {
DWORD Chip; // in – always 0
DWORD Group; // in – always 0
DWORD Mask; // in - bit mask for bits to be read or
modified
DWORD Value; // in - value of bits to write, out - value
of bits read
} HAL_GPIO_STRUCT, * PHAL_GPIO_STRUCT;
#define IOCTL_HAL_GPIO_READ 0x1012020
#define IOCTL_HAL_GPIO_WRITE 0x1012024
#define IOCTL_HAL_GPIO_DIRECTION 0x1012028
void WriteGPIO(DWORD val, DWORD mask)
{
HAL_GPIO_STRUCT buf;
DWORD len;
buf.Chip = buf.Group = 0;
buf.Mask = mask;
buf.Value = val;
if (!KernelIoControl(IOCTL_HAL_GPIO_WRITE,
(LPVOID)&buf, sizeof(HAL_GPIO_STRUCT),
NULL, 0, &len))
printf(“Kernel IOCTL failed\n”);
}
Usage of these is similar to the above routines for the FPGA. Of the 32 bits of the mask and value
registers, only 28 are used (corresponding to GPIO:0-27).
