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Chapter 3: Testing Performance
To test the single-clock, single-edge, state acquisition
2 Using SMA cables, connect the oscilloscope to the pulse generator channel
1 Output, channel 2 Output, and Trigger Output.
Connect the 1680/81/90/91A,AD Logic Analyzer to the Pulse Generator
Te s t i n g
Combinations
Connect to 8133A
Channel 2 Output
Connect to 8133A
Channel 2 Output
Connect to 8133A
Channel 1 Output
1 Pod 1, channel 3
Pod 3, channel 3
Pod 5, channel 3
Pod 7, channel 3
Pod 2, channel 3
Pod 4, channel 3
Pod 6, channel 3
Pod 8, channel 3 *
Pod 1 clock/data channel (Clk 1)
2 Pod 1, channel 11
Pod 3, channel 11
Pod 5, channel 11
Pod 7, channel 11
Pod 2, channel 11
Pod 4, channel 11
Pod 6, channel 11
Pod 8, channel 11*
Pod 1 clock/data channel (Clk 1)
*1680A,AD or 1690A,AD only