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Chapter 31 External Bus
10.DMA Access Operation
At SDRAM page hit (Shortest)
Figure 10-4 Timing Chart for DMA Fly - by Transfer (SDRAM/FCRAM to I/O) with Page Hits (Shortest)
column
address
IOWR
DACKn
DEOPn
DREQn
Basic
mode
MCLK
CSn
SCAS
A31 to 0
D31 to 0
WRn(SWE)
SRAS
basic cycle
I/O wait
cycle
I/O hold
wait
MCLKE
I/O
basic cycle
SDRAM
Data setup