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HD151TS207SS
Rev.1.00, Apr.25.2003, page 10 of 38
I
2
C Controlled Register Bit Map (cont.)
Byte4 Control Register
Bit Description Contents Type Default Note
7 USB_48 2x output drive 0 = 2x Drive strength,
1 = Normal
RW 0
6 USB_48MHz Output Enable 0 = Disabled,
1 = Enabled
RW 1
5 Allow control of PCIF_2 with
assertion of PCI_STOP#
0 = Free Running
1 = Stopped with PCI_STOP#
RW 0
4 Allow control of PCIF_1 with
assertion of PCI_STOP#
0 = Free Running
1 = Stopped with PCI_STOP#
RW 0
3 Allow control of PCIF_0 with
assertion of PCI_STOP#
0 = Free Running
1 = Stopped with PCI_STOP#
RW 0
2 PCIF_2 Output enable 0 = Disabled, 1 = Enabled RW 1
1 PCIF_1 Output enable 0 = Disabled, 1 = Enabled RW 1
0 PCIF_0 Output enable 0 = Disabled, 1 = Enabled RW 1
Byte5 Control Register
Bit Description Contents Type Default Note
7 DOT_48MHz Output Enable 0 = Disabled, 1 = Enabled RW 1
6 Reserved RW 1
5 VCH Select 66MHz / 48MHz 0 = 3V66 mode
1 = VCH (48 MHz) mode
RW 0
4 3V66_4/VCH Output Enable 0 = Disabled (tristate),
1 = Enabled
RW 1
3 3V66_3 Output Enable 0 = Disabled, 1 = Enabled RW 1
2 3V66_2 Output Enable 0 = Disabled, 1 = Enabled RW 1
1 3V66_1 Output Enable 0 = Disabled, 1 = Enabled RW 1
0 3V66_0 Output Enable 0 = Disabled, 1 = Enabled RW 1
Byte6 Control Register
Bit Description Contents Type Default Note
7 Test Clock Mode 0 = Disabled, 1 = Enabled RW 0
6 Reserved RW 0
5 FS_A & FS_B Operation 0 = Normal, 1 = Test mode RW 0
4 SRC Frequency Select 0 = 100MHz, 1 = 200 MHz RW 0
3 Reserved RW 0
2 Spread Spectrum Mode 0 = Spread OFF
1 = Spread ON
RW 0 See
B9[7:6]
1 REF1 Output Enable 0 = Disabled, 1 = Enabled RW 1
0 REF0 Output Enable 0 = Disabled, 1 = Enabled RW 1