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3.0 Registers
3.1 Conventions
Bt8960
Single-Chip 2B1Q Transceiver
N8960DSB
3.2.1 0x00—Global Modes and Status Register (global_modes)
hw_revision[3:0] Chip Revision Number—Read-only unsigned binary field encoded with the chip revision
number. Smaller values represent earlier versions while larger values represent later versions.
The zero value represents the original prototype release. Consult factory for current value and
revision.
part_id[2:0] Part ID—Read-only binary field set to binary 001 identifying the part as Bt8960.
mode Power Down Mode—Read/write control bit. When set, stops all filter processing and zeros the
transmit output for reduced power consumption. All RAM contents are preserved. The mode
bit is automatically set by RST
assertion and upon initial power application. It can be cleared
only by writing a logic zero, at which time filter processing and transmitter operation can pro-
ceed.
3.2.2 0x01—Serial Monitor Source Select Register (serial_monitor_source)
hclk_freq[1,0] HCLK Frequency Select—Read/write binary field selects the frequency of the HCLK output.
7 6 5 4 3 2 1 0
hw_revision[3] hw_revision[2] hw_revision[1] hw_revision[0] part_id[2] part_id[1] part_id[0] mode
7 6 5 4 3 2 1 0
hclk_freq[1] hclk_freq[0] smon[5] smon[4] smon[3] smon[2] smon[1] smon[0]
hclk_freq[1] hclk_freq[0] HCLK Frequency
0 0 Symbol Frequency (F
QCLK
) times 64 hclk_freq[1,0] is set to “00” upon
assertion of the RST
pin and power-on detection.
0 1 Symbol Frequency (F
QCLK
) times 16
1 0 Symbol Frequency (F
QCLK
) times 32
1 1 Symbol Frequency (F
QCLK
) times 64
