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1.0 System Overview
1.3 Pin Descriptions
Bt8960
Single-Chip 2B1Q Transceiver
N8960DSB
Analog Transmit Interface
TXP, TXN Transmit Positive,
Negative
OA Differential Transmit Line Driver Outputs. These signals are used to drive the
subscriber line after passing through the hybrid and line transformer.
TXLDIP,
TXLDIN
Transmit Line
Driver In Positive,
Negative
IA Differential Transmit Line Driver Inputs. These inputs should be connected to the
TXPSP, TXPSN outputs after passing through an external RC filter.
TXPSP,
TXPSN
Transmit Pulse-
Shaping Filter
Positive, Negative
OA Differential Transmit Pulse-shaping Filter Outputs. These outputs should be con-
nected to an external RC filter, which is then connected to the TXLDIP and TXL-
DIN inputs.
Analog Receive Interface
RXP, RXN Receive Positive,
Negative
IA Differential Receiver Inputs. RXP and RXN receive the signal from the subscriber
line.
RXBP, RXBN Receive Balance
Positive, Negative
IA Differential Receiver Balance Inputs. RXBP and RXBN are used to subtract the
echo of the signal being transmitted on the subscriber line. They should be con-
nected to the TXP, TXN output pins through the hybrid circuit. This signal is sub-
tracted from the signal being received by the RXP and RXN inputs in the Variable
Gain Amplifier (VGA).
Voltage Reference Generator Interface
RBIAS Resistor Bias OA Connection point for external bias resistor.
VCOMO Common Mode
Voltage Outputs
OA Common mode voltage for the analog circuitry. This pin should be connected to
an external filtering capacitor.
VCOMI Common Mode
Voltage Inputs
OA Common mode voltage for the analog circuitry. This pin should be connected to
an external filtering capacitor.
VCCAP Voltage Compen-
sation Capacitor
OA Analog Voltage Compensation Capacitor. This pin should be connected to an
external filtering capacitor.
VRXP, VRXN Receiver Voltage
Reference Posi-
tive, Negative
OA Analog Receive Circuitry Reference Voltages. These pins should be connected to
external filtering capacitors.
VTXP, VTXN Transmit Voltage
Reference Posi-
tive, Negative
OA Analog Transmit Circuitry Reference Voltages. These pins should be connected
to external filtering capacitors.
Clock Interface
XTALI/
MCLK
Crystal In/Master
Clock
I A bimodal input that can be used as the crystal input or as the master clock
input. If an external clock is connected to this input, XTALO should be left float-
ing. The frequency of the crystal or clock should be 64 times the symbol rate (32
times the data rate).
XTALO Crystal Output O Connection point for the crystal.
HCLK High Speed
Clock Out
O HCLK can be configured to run at 16, 32, or 64 times the symbol rate. Upon
reset, it is set to 64 times the symbol rate. This clock will be phase locked to the
incoming data when the Bt8960 is configured as the remote unit.
XOUT Crystal Clock Out O Buffered-crystal oscillator output.
Table 1-2. Hardware Signal Definitions (3 of 4)
Pin Label Signal Name I/O Definition
