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ported in the status byte, and what bits in
the status byte should cause SRQ.
+
A register bit is TRUE, i.e., some
-
thing has happened, when it is
set to 1. It is FALSE when set to
0.
Note that all event registers and the status
byte records positive events. That is when
a condition changes from inactive to ac
-
tive, the bit in the event register is set
true. When the condition changes from
active to inactive, the event register bits
are not affected at all.
When you read the contents of a register,
the counter answers with the decimal sum
of the bits in the register.
Using the Subsystems
Status Subsystem 6-15
Logical OR
Enable Register
E ve n t R e g iste r
Standard Event Register
Service Request Enable
Logical OR
Status Byte Register
Logical OR
Condition Register
Condition Register
SRQ m essage
Device Register 0 Operation Status Register
Q u e s tio n a b le D a ta R e g iste r
01234567
E rror Q ueue
Output Queue
Enable Register
E ve n t R e g iste r
Enable Register
E ve n t R e g iste r
Logical OR
E ve n t R e g iste r
Enable Register
Logical OR
Figure 6-6 CNT-8X Status register structure.