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Appendix D: Performance Verification
73A-270 Arbitrary Pulse/Pattern Generator Module
71
Table A–7: (Cont.)VXIbus TTL Trigger Line Verification Ch. B triggered by Ch. A
TTLTRG Line Change Setup, & Restart Pattern
TTLTRG3* IBWRT "Q83X38T"
IBWRT "1B"
TTLTRG4* IBWRT "Q84X48T"
IBWRT "1B"
TTLTRG5* IBWRT "Q85X58T"
IBWRT "1B"
TTLTRG6* IBWRT "Q86X68T"
IBWRT "1B"
TTLTRG7* IBWRT "Q87X78T"
IBWRT "1B"
e. With the following commands, disable both channels from the
TTLTRGX* lines and restart the channel A pulse pattern. Verify that
channel B is not putting out any pulse pattern, and then stop the pulse
transmission:
IBWRT "Q88X88T"
IBWRT "1B"
(Verify that channel B is not putting out any pattern)
IBWRT "Q"
8. Verify the EXT TRG B input with the following steps:
a. Connect TTL OUT A to EXT TRG B. Restart both channels by sending:
IBWRT "1B"
(Verify a 500 kHz pulse-pattern)
b. Check that channel B is putting out a 500 kHz pulse pattern (triggered
by channel A) and then stop the pattern by sending:
IBWRT "Q"
(Verify that the pattern stopped)
c. Disconnect TTL OUT A from EXT TRG B.
9. Verify channel B breakpoint recognition with the following steps: