Filter
Top Products
DEI PVM-4210
Document Number 9100-0201 Rev 8
Directed Energy, Inc. 2000-2002
Page 8
Output Pulse Configuration With Non-Inverted Gate Selected
The ouput polarity can be reversed (so that the output is held at high voltage
when the gate is low, and pulsed ground when the gate is high) by jumpering
pins 10 and 11 together. This is shown in the figure below:
GATE
INPUT
GROUND
+5V
+ PULSE
OUT
GROUND
GROUND
+ PULSE
VOLTAGE OUT
- PULSE
VOLTAGE OUT
- PULSE
OUT