Cypress CY3640 USB Starter Kit
User’s Guide
Cypress Semiconductor Ver 0.993
Page 32
; At some point, either the 0 data will be ACK'd or a SETUP
; will come in.
; Either event will cause the "Enable Respond
; to In Packets" to be reset, and we will fall out of the loop.
; In either case, an EP0 IRQ will be generated (5.9.2.2 in Cyp
; device spec) if EP0 irq is enabled.
USBSendWaitForComplete:
; Poll the send complete bit
; This will be reset when the data has been sent to the host
; and the host has ACK's, or the host has sent another SETUP
; which should terminate this activity in any case.
iord USBEndP0TxConfig
and a,USBEndP0TxRespond
jz USBSendWaitComplete
; Check for OUT packet cancelling send. A STATUS OUT should
; terminate any pending IN's. A Setup could also set the Out bit.
iord USBEndP0RxStatus
and a,USBEndP0RxOut
jnz USBSendWaitComplete ; Cancelled
; Keep waiting
jmp USBSendWaitForComplete
USBSendWaitComplete:
ret
;//$PAGE
;********************************************************
; USBEventEP0VendorRqst()
; @func Vendor request on end point zero.
; @devnote Runs in interrupt disabled context.
;********************************************************
USBEventEP0VendorRqst:
; Save it
push x
; Check Protocol
mov a,[USBEndP0FIFO_1]
USBEventEP0VendorRqstPing:
cmp a,0h
jnz USBEventEP0VendorRqstReadROM ; No
;*********************************************
; Ping Event
;*********************************************
jmp USBEventEP0VendorRqstFinish
USBEventEP0VendorRqstReadROM:
cmp a,01h
jnz USBEventEP0VendorRqstReadRAM ; No
;*********************************************
; Read ROM Event
;*********************************************
mov a,[USBEndP0FIFO_2]
index USBSendROMBufferBase
mov [USBEndP0FIFO_1],a
jmp USBEventEP0VendorRqstFinish
USBEventEP0VendorRqstReadRAM:
cmp a,02h
jnz USBEventEP0VendorRqstWriteRAM ; No
;*********************************************
; Read RAM Event
;*********************************************
