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Dell™ PowerEdge™ M610 Technical Guidebook
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Note: For QR mixed with a SR/DR DIMM, the QR needs to be in the white DIMM connector. There is no requirement in the order of SR and DR DIMMs.
NOTE: For Quad-Rank DIMMs mixed with single- or dual-rank DIMMs, the QR DIMM needs to be in the slot with the white ejection tabs (the rst DIMM slot in each channel).
There is no requirement for the order of SR and DR DIMMs
Supported
Not Supported
•TheDIMMsocketsareplaced450mils(11.43mm)apart,center-to-centerinordertoprovide
enough space for sucient airflow to cool stacked DIMMs.
•
The
PowerEdge M610
memory system supports up to 12 DIMMs. DIMMs must be installed in each
channel starting with the DIMM farthest from the processor. Population order will be identified by
the silkscreen designator and the System Information Label (SIL) located on the chassis cover.
•MemoryOptimized:{1,2,3},{4,5,6},{7,8,9}
•AdvancedECCorMirrored:{2,3},{5,6},{8,9}
•QuadRankorUDIMM:{1,2,3},{4,5,6},{7,8,9}
C. Speed
Memory Speed Limitations
The memory frequency is determined by a variety of inputs:
•SpeedoftheDIMMs
•SpeedsupportedbytheCPU
•CongurationoftheDIMMs
The table below shows the memory populations and the maximum frequency achievable for that
configuration.
DIMM TYPE DIMM 0 DIMM 1 DIMM 2
NUMBER
OF DIMMS
800 1066 1333

SR DR 2
DR DR 2
QR SR 2
QR DR 2
QR QR 2
SR SR SR 3
SR SR DR 3
SR DR DR 3
DR DR DR 3
DIMM TYPE DIMM 0 DIMM 1 DIMM 2
NUMBER
OF DIMMS
800 1066 1333

SR 1
DR 1
SR SR 2
SR DR 2
DR DR 2

SR 1
DR 1
QR 1
SR SR 2