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Dell™ PowerEdge™ M610 Technical Guidebook
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MODEL SPEED POWER CACHE CORES

2.93GHz 95W 8M 4

2.80GHz 95W 8M 4

2.66GHz 95W 8M 4

2.53GHz 80W 8M 4

2.40GHz 80W 8M 4

2.26GHz 80W 8M 4

2.26GHz 60W 8M 4

2.13GHz 80W 4M 4

2.13GHz 60W 4M 4

2.00GHz 80W 4M 4

1.86GHz 80W 4M 2
CPU Power Voltage Regulation Modules (EVRD 11.1)
Voltage regulation to the 5500 series 2S processor (Nehalem EP) is provided by EVRD (Enterprise
Voltage Regulator-Down). EVRDs are embedded on the planar. CPU core voltage is not shared between
processors. EVRDs support static phase shedding and power management via the PMBus.
SECTION 6. MEMORY
A. Overview / Description
The PowerEdge M610 utilizes DDR3 memory providing a high performance, high-speed memory
interface capable of low latency response and high throughput. The PE M610 supports registered ECC
DDR3 DIMMs (RDIMM) or unbuered ECC DDR3 DIMMs (UDIMM).
KeyfeaturesofthePowerEdgeM610memorysysteminclude:
•Registered(RDIMM)andUnbuered(UDIMM)ECCDDR3technology
•Eachchannelcarries64dataandeightECCbits
•Supportforupto96GBofRDIMMmemory(withtwelve8GBRDIMMs)
•Supportforupto24GBofUDIMMmemory(withtwelve2GBUDIMMs)
•Supportfor1066/1333MHzsingleanddual-rankDIMMs
•Supportfor1066MHzquadrankDIMMsSingleDIMMcongurationonlywithDIMMinsocketA1
•SupportODT(OnDieTermination)Clockgating(CKE)toconservepowerwhenDIMMsarenot
accessed
•DIMMsenteralow-powerself-refreshmode
•I
2
C access to SPD EEPROM for access to RDIMM thermal sensors
•SingleBitErrorCorrection
•SDDC(SingleDeviceDataCorrection–x4orx8devices)
•Supportforclosedloop
•ThermalManagementonRDIMMsandUDIMMsMultiBitErrorDetectionSupportforMemory
Optimized Mode
•SupportforAdvancedECCmode
•SupportforMemoryMirroring
•SupportforMemorySparing